LIBRARY IEEE;    										//使用标准库
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY  dff  IS											//实体定义
    PORT(d,clk:IN STD_LOGIC;								//端口定义
              q,qb:OUT STD_LOGIC);
END  dff;
ARCHITECTURE rtl OFdff IS
BEGIN
    P1:PROCESS(clk)
       BEGIN
           IF(clk'event AND clk='1')THEN						//使用IF结构
              q<=d;
              qb<=NOT d;
           END IF;
    END PROCESS P1;
END rtl;
